February 4, 2014

Thinking of appealing processor+function claims? Beware a sua sponte 112 rejection.

By now, you are probably aware of the numerous patent law changes made under the America Invents Act.  If you are involved in patent application preparation and/or prosecution, you are probably also aware of the recent tendencies of Examiners to (rightly or wrongly) interpret claim terms under 35 U.S.C. 112, sixth paragraph.

One trend that you may not be aware of from 2013, however, is the growing number of Appeals involving computer related claims where the Patent Trial and Appeals Board (PTAB) issued one or more new grounds of rejection under 35 U.S.C. § 112.  These following example cases include claims drafted in ways that patent prosecutors frequently use, in ways that are commonly suggested by Examiners during prosecution, and in ways that have been used to obtain patents for years.

For example, in Ex Parte Smith, Appeal 2012-007631 (application 12/579,383), the following claims were addressed by the PTAB.

1.         A computer system comprising:

            memory; and

            a processor in communication with the memory, the processor programmed to:

            receive, from a user, a first review of an asset; store the first review of the asset in

            association with a user identifier in a memory device;

            receive, from the user, a second review of the asset;

            store the second review in association with the first review and the user identifier in a memory device; and

            generate an opinion timeline for the asset for the user associated with the user identifier.

 

8.         A computer-implemented method comprising:

            receiving, from a user, a first review of an asset;

            storing the first review of the asset in association with a user identifier in a memory device;

            receiving, from the user, a second review of the asset;

            storing the second review in association with the first review and the user identifier in a memory device; and

            generating an opinion timeline for the asset for the user associated with the user identifier.

 

The Examiner did not reject the claims under any section of 35 U.S.C. § 112, and only rejected the claims under the 35 U.S.C. § 102(e).  Despite the fact that the PTAB reversed the Examiner’s rejections of the claims under 35 U.S.C. § 102(e), the PTAB issued new grounds for rejecting the above claims under 35 U.S.C. § 112.

First, the PTAB issued a new ground for rejecting claim 1 under 35 U.S.C. § 112, second paragraph, for indefiniteness.

How, you ask?  The PTAB interpreted the processor+functional limitations of claim 1 under 35 U.S.C. § 112, sixth paragraph.  This is despite the fact that the Examiner did not appear to have this interpretation prior to Appeal.

The PTAB also concluded that the specification did not disclose an algorithm that would transform the processor into a “special purpose processor” for performing the claimed functions.  Therefore, the PTAB concluded, the specification failed to include sufficient corresponding structure for interpretation of the processor+functional limitations under 35 U.S.C. § 112, sixth paragraph.

Interestingly, the PTAB even noted that the application included a flowchart for performing the claimed functions.  The PTAB, however, stated that the flowchart and the associated description “simply restate the claimed functions without conveying to an ordinarily skilled artisan how the processor ensures that the functions . . . are performed.”

Second, the PTAB issued a new ground for rejection for claim 8 under 35 U.S.C. § 112, first paragraph, as failing to satisfy the written description requirement.  Similar to its conclusion with respect to claim 1, the PTAB concluded that the specification included only general statements of the functions to be performed and lacked description as to how the claimed functions are actually performed.

In Ex Parte Erol, Appeal 2011-001143 (application 11/461,109), the following claim was addressed by the PTAB.

18. A system comprising:

      a reader adapted to read a machine readable identifier; and

      a processor adapted to:

      determine, from the machine readable identifier, a first object descriptor associated with an object, the first object descriptor specifying one or more features of content within the object;

      determine a set of one or more objects from digital media content;

      generate an object descriptor for each object in the set of objects, each object descriptor specifying one or more features of content within an object from the set;

      identify at least one object descriptor from the object descriptors determined for the set of objects that matches the first object descriptor determined from the machine readable identifier; and

      perform an action in response to identifying the at least one object descriptor that matches the first object descriptor.

As in Ex Parte Smith, the PTAB in Ex Parte Erol interpreted the processor+functional limitations of claim 18 as invoking 35 U.S.C. § 112, sixth paragraph.  This is again despite the fact that the Examiner had not previously interpreted the claims under 35 U.S.C. § 112, sixth paragraph.

Based on this new interpretation, the PTAB issued a new ground for rejection under 35 U.S.C. § 112, second paragraph, for indefiniteness.

The PTAB stated that “the Specification must disclose a sufficient algorithm for all recited functional claim limitations.”  The PTAB noted that the Specification here provided examples for the functional limitation of claim 18 of “perform an action in response to identifying the at least one object descriptor that matches the first object descriptor.”

However, the PTAB concluded this was “an impermissible attempt to claim every way to “perform an action” under the sun, and do not constitute a sequence of steps of a particular algorithm required to meet the definiteness requirements of § 112, second paragraph.”

In Ex Parte Lakkala, Appeal 2011-005126 (application 10/949,568), the following claim was addressed by the PTAB.

27. A user device, comprising:

[(a)] a memory device for storing a program; and

[(b)] a processor in communication with the memory device, the processor is configured with the program to:

[(i)] control receiving a message of an event at the user device;

[(ii)] control at the user device creation of metadata relating to the event in response to the received message of the event and control storing the created metadata in the memory device;

[(iii)] control collection of content data in response to the received message of the event to generate a content data set relating to the message of the event; and

[(iv)] control adding of the created metadata to the content data set.

As in Ex Parte Smith and Ex Parte Erol, claim 27 was not rejected by the Examiner under any section of 35 U.S.C. § 112.  Again, however, the PTAB concluded that the processor+functional limitations of claim 27 should be interpreted under 35 U.S.C. § 112, sixth paragraph.  And like Ex Parte Smith and Ex Parte Erol, the PTAB issued a new grounds for rejection of claim 27 under 35 U.S.C. § 112, second paragraph, for indefiniteness.

Here, the PTAB noted that “[t]he only portion of the Specification that describes the processor and its associated functions provides that the user device may include a CPU and a memory “containing programming for controlling, in accordance with the present invention, data processing and transfer operations among the various elements” of the user device.”  The PTAB then stated that, “[t]hat description is merely a general statement that fails to mention the specific control functions recited in claim 27, much less provide any detailed steps as to how the processor would perform functions such as controlling creation of metadata and controlling collection of content data.”

Again, interestingly, the PTAB noted that the Specification does include a flow chart corresponding to the functions of claim 27.  The PTAB concluded, however, that “the flow chart presents the process at a high level without reference to the control functions to be performed by the processor.”  The PTAB further stated that “[e]ven if the steps shown in the flow chart could somehow be understood as corresponding to the functions ascribed to the claimed processor, the flow chart and accompanying description in the Specification would simply be restating the claimed functions without conveying to a skilled artisan how the processor ensures that the functions are performed.”  Therefore, the PTAB concluded that “the Specification fails to disclose an algorithm that transforms the general purpose processor into a special purpose processor programmed to perform the control functions recited in claim 27.

So what is the take away?

When preparing patent applications involving processor +function claims, it is clear that an algorithm or flowchart should be included and that algorithm, flowchart, or associated description should do more than merely restate the claimed functions.  Additionally, it may be wise to discuss the functions of the algorithm or flowchart within the detailed description as being performed by a processor.

For those prosecuting previously filed applications including processor type claims, be conscious of the possibility of new rejections under 112 when considering whether to Appeal applications including claims that have processor+functional limitations.  Even if the Examiner does not interpret those types of claims under 35 U.S.C. § 112, sixth paragraph, or reject your claims under 35 U.S.C. § 112, the PTAB might.  If the PTAB issues grounds for rejection under 35 U.S.C. § 112, you may have a hard time advancing prosecution post-appeal.